Oxidizing filler material lines to increase width of hard mask lines

ABSTRACT

A starting semiconductor structure includes a layer of filler material, a hard mask layer over the layer of filler material, and filler material lines over the hard mask layer. The starting semiconductor structure is placed in an etching chamber, and oxygen gas and high plasma power are inserted into the etching chamber and oxidizing, resulting in one or more of the filler material lines being oxidized, the filler material line(s) increasing in width from oxidizing, and etching the hard mask layer with a chemistry that is non-selective to the oxidized filler material lines and hard mask layer, and which has a stronger lateral etch selectivity to the oxidized filler material lines than the hard mask layer.

BACKGROUND OF THE INVENTION Technical Field

The present invention generally relates to FinFET fabrication using areplacement metal gate (RMG) process. More particularly, the presentinvention relates to fabrication of FinFETs using a RMG process andhaving wider than nominal gates.

Background Information

In order to continue reducing the size of semiconductor devices(transistors), self-aligned double and quadruple patterning processeshave been developed for replacement metal gate processes to increasedummy gate width. However, these processes use non-lean chemistry, whichincreases cost, suffer low etch rates lowering throughput, and/orincreased defects reducing yield.

Thus, a need exists for a way to increase dummy gate width that does notincrease costs, lower throughput or reduce yields.

SUMMARY OF THE INVENTION

The shortcomings of the prior art are overcome and additional advantagesare provided through the provision, in one aspect, of a method ofoxidizing filler material lines to increase width of hard mask lines.The method includes providing a starting semiconductor structure, thestarting semiconductor structure including a layer of filler material, ahard mask layer over the layer of filler material, and a plurality offiller material lines over the hard mask layer. The method furtherincludes placing the starting semiconductor structure in an etchingchamber, inserting oxygen gas and plasma into the etching chamber afterthe placing such that one or more of the plurality of filler materiallines are oxidized, the oxidized one or more of the plurality of fillermaterial lines increasing in width, and etching the hard mask layer witha chemistry that is non-selective to the oxidized filler material linesand hard mask layer, and which has a stronger lateral etch selectivityto the oxidized filler material lines than the hard mask layer.

In another aspect, a semiconductor structure is provided. Thesemiconductor structure includes a layer of filler material, a hard masklayer over the layer of filler material, and a plurality of fillermaterial lines having one or more first widths over the hard mask layer,forming a tri-layer structure.

These, and other objects, features and advantages of this invention willbecome apparent from the following detailed description of the variousaspects of the invention taken in conjunction with the accompanyingdrawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view of one example of a startingsemiconductor structure, the starting semiconductor structure includinga layer of filler material, a hard mask layer over the layer of fillermaterial, and multiple filler material lines over the hard mask layer,in accordance with one or more aspects of the present invention.

FIG. 2 is a simplified view of one example of placing the startingsemiconductor structure 100 of FIG. 1 into an etching chamber with a gasline for oxygen and a line for plasma, in accordance with one or moreaspects of the present invention.

FIG. 3 is a simplified view of one example of inserting oxygen andplasma into the etching chamber, and oxidizing the filler materiallines, in accordance with one or more aspects of the present invention.

FIG. 4 depicts the semiconductor structure of FIG. 3 after etching thehard mask layer using the oxidized filler material lines as mandrels,creating wider hard mask lines, in accordance with one or more aspectsof the present invention.

DETAILED DESCRIPTION OF THE INVENTION

Aspects of the present invention and certain features, advantages, anddetails thereof, are explained more fully below with reference to thenon-limiting examples illustrated in the accompanying drawings.Descriptions of well-known materials, fabrication tools, processingtechniques, etc., are omitted so as not to unnecessarily obscure theinvention in detail. It should be understood, however, that the detaileddescription and the specific examples, while indicating aspects of theinvention, are given by way of illustration only, and are not by way oflimitation. Various substitutions, modifications, additions, and/orarrangements, within the spirit and/or scope of the underlying inventiveconcepts will be apparent to those skilled in the art from thisdisclosure.

Approximating language, as used herein throughout the specification andclaims, may be applied to modify any quantitative representation thatcould permissibly vary without resulting in a change in the basicfunction to which it is related. Accordingly, a value modified by a termor terms, such as “about,” is not limited to the precise valuespecified. In some instances, the approximating language may correspondto the precision of an instrument for measuring the value.

The terminology used herein is for the purpose of describing particularexamples only and is not intended to be limiting of the invention. Asused herein, the singular forms “a”, “an” and “the” are intended toinclude the plural forms as well, unless the context clearly indicatesotherwise. It will be further understood that the terms “comprise” (andany form of comprise, such as “comprises” and “comprising”), “have” (andany form of have, such as “has” and “having”), “include (and any form ofinclude, such as “includes” and “including”), and “contain” (and anyform of contain, such as “contains” and “containing”) are open-endedlinking verbs. As a result, a method or device that “comprises,” “has,”“includes” or “contains” one or more steps or elements possesses thoseone or more steps or elements, but is not limited to possessing onlythose one or more steps or elements. Likewise, a step of a method or anelement of a device that “comprises,” “has,” “includes” or “contains”one or more features possesses those one or more features, but is notlimited to possessing only those one or more features. Furthermore, adevice or structure that is configured in a certain way is configured inat least that way, but may also be configured in ways that are notlisted.

As used herein, the term “connected,” when used to refer to two physicalelements, means a direct connection between the two physical elements.The term “coupled,” however, can mean a direct connection or aconnection through one or more intermediary elements.

As used herein, the terms “may” and “may be” indicate a possibility ofan occurrence within a set of circumstances; a possession of a specifiedproperty, characteristic or function; and/or qualify another verb byexpressing one or more of an ability, capability, or possibilityassociated with the qualified verb. Accordingly, usage of “may” and “maybe” indicates that a modified term is apparently appropriate, capable,or suitable for an indicated capacity, function, or usage, while takinginto account that in some circumstances the modified term may sometimesnot be appropriate, capable or suitable. For example, in somecircumstances, an event or capacity can be expected, while in othercircumstances the event or capacity cannot occur—this distinction iscaptured by the terms “may” and “may be.”

As used herein, unless otherwise specified, the term “about” used with avalue, such as measurement, size, etc., means a possible variation ofplus or minus five percent of the value. Also, unless otherwisespecified, a given aspect of semiconductor fabrication described hereinmay be accomplished using conventional processes and techniques, wherepart of a method, and may include conventional materials appropriate forthe circumstances, where a semiconductor structure is described.

Reference is made below to the drawings, which are not drawn to scalefor ease of understanding, wherein the same reference numbers are usedthroughout different figures to designate the same or similarcomponents.

FIG. 1 is a cross-sectional view of one example of a startingsemiconductor structure 100, the starting semiconductor structureincluding a layer of filler material 102 (e.g., amorphous silicon orpolysilicon), a hard mask layer 104 over the layer of filler material,and multiple filler material lines 106 over the hard mask layer, inaccordance with one or more aspects of the present invention.

The starting structure may be conventionally fabricated, for example,using known processes and techniques. Further, unless noted otherwise,conventional processes and techniques may be used to achieve individualsteps of the fabrication process of the present invention. However,although only a portion is shown for simplicity, it will be understoodthat, in practice, many such structures may be included on the same bulksubstrate.

FIG. 2 is a simplified view of one example of placing the startingsemiconductor structure 100 of FIG. 1 into an etching chamber 108 with agas line for oxygen 110 and a line for plasma 112, in accordance withone or more aspects of the present invention.

FIG. 3 is a simplified view of one example of inserting oxygen andplasma, 114 and 116, respectively, into etching chamber 108, andoxidizing 117 the filler material lines 106, in accordance with one ormore aspects of the present invention.

FIG. 4 depicts the semiconductor structure of FIG. 3 after etching thehard mask layer 104 using the oxidized filler material lines 106 asmandrels, creating wider hard mask lines 118, in accordance with one ormore aspects of the present invention.

In a first aspect, disclosed above is a method. The method includesproviding a starting semiconductor structure, the starting semiconductorstructure including a layer of filler material, a hard mask layer overthe layer of filler material, and filler material lines over the hardmask layer. The method further includes placing the startingsemiconductor structure in an etching chamber, inserting oxygen gas withhigh plasma power (about 500 to about 2,000 watts) into the etchingchamber after the placing such that one or more of the filler materiallines are oxidized, the oxidized one or more of the filler materiallines increasing in width, and etching the hard mask layer with achemistry that is non-selective to the oxidized filler material linesand hard mask layer, and which has a stronger lateral etch selectivityto the oxidized filler material lines than the hard mask layer.

In one example, more than one cycle of inserting and etching may be, forexample, performed, further increasing the width of the oxidized one ormore of the plurality of filler material lines. In one example, widthincreases by about 1 nm to about 10 nm. In one example, for x cycles,each cycle performs the etching 1/× of desired width increase.

In one example, a maximum width increase of the filler material lines inthe method of the first aspect from a single cycle of oxidizing andetching is about 3 nm.

In one example, the width of the filler material lines in the method ofthe first aspect can also be altered, for example, using a time ofoxidation. In one example, where a maximum width increase from a singlecycle of oxidizing and etching is about 3 nm, a width increase of lessthan about 3 nm can be achieved, for example, by reducing a time ofoxidation.

In one example, the filler material in the method of the first aspect ofthe first aspect may include, for example, amorphous silicon.

In one example, the filler material in the method of the first aspect ofthe first aspect may include, for example, polysilicon.

In one example, the plasma power in the method of the first aspect mayhave, for example, a power of about 500 watts to about 2,000 watts.

In a second aspect, disclosed above is a semiconductor structure. Thesemiconductor structure includes a layer of filler material, a hard masklayer over the layer of filler material, and filler material lineshaving first width(s) over the hard mask layer, forming a tri-layerstructure.

In one example, the semiconductor structure may further include, forexample, an etching chamber with the tri-layer structure therein, afirst inlet to the etching chamber for a first gas, and a second inletto the etching chamber for a second gas. In one example, one or more ofthe filler material lines may include, for example, an outer oxidationlayer having second width(s) larger than the corresponding firstwidth(s). In one example, where the outer oxidation layer(s) arepresent, a thickness of the outer oxidation layer may include, forexample, about 1 nm to about 10 nm.

While several aspects of the present invention have been described anddepicted herein, alternative aspects may be effected by those skilled inthe art to accomplish the same objectives. Accordingly, it is intendedby the appended claims to cover all such alternative aspects as fallwithin the true spirit and scope of the invention.

1-10. (canceled)
 11. A semiconductor structure, comprising: a layer offiller material; a hard mask layer over the layer of filler material;and a plurality of filler material lines having one or more first widthsover the hard mask layer, forming a tri-layer structure.
 12. Thesemiconductor structure of claim 11, further comprising: an etchingchamber with the tri-layer structure therein; a first inlet to theetching chamber for a first gas; and a second inlet to the etchingchamber for a second gas.
 13. The semiconductor structure of claim 12,wherein one or more of the filler material lines comprise at least oneouter oxidation layer, the one or more filler material lines with atleast one outer oxidation layer together having one or more secondwidths larger than the corresponding one or more first widths.
 14. Thesemiconductor structure of claim 13, wherein a thickness of the at leastone outer oxidation layer comprises about 1 nm to about 10 nm.
 15. Thesemiconductor structure of claim 12, wherein the first gas is one ofoxygen and plasma, and wherein the second gas is the other of oxygen andplasma.
 16. A semiconductor structure, comprising: a layer of fillermaterial; a hard mask layer over the layer of filler material; and aplurality of filler material lines over the hard mask layer, wherein oneor more of the plurality of filler material lines comprise at least oneouter oxidation layer, the layer of filler material, the hard mask layerand the plurality of filler material lines forming a tri-layerstructure.
 17. The semiconductor structure of claim 16, wherein athickness of the at least one outer oxidation layer comprises about 1 nmto about 10 nm.
 18. The semiconductor structure of claim 16, furthercomprising: an etching chamber with the tri-layer structure therein; afirst inlet to the etching chamber coupled to a source of oxygen gas toform the at least one outer oxidation layer of the one or more of theplurality of filler material lines; a second inlet to the etchingchamber coupled to a source of plasma for etching the hard mask layerusing the one or more of the plurality of filler material lines asmandrels.
 19. The semiconductor structure of claim 18, wherein athickness of the outer oxidation layer comprises about 1 nm to about 10nm.